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Mid Level Digital Integrated Circuit Engineer

Company: BOEING
Location: Carson
Posted on: April 8, 2021

Job Description:

We are Boeing Research & Technology (BR&T): Boeing's global research and development team creating and implementing innovative technologies that make the impossible possible and enabling the future of aerospace. We are engineers and technicians, skilled scientists and bold innovators; Join us and put your passion, determination, and skill to work building the future! #TheFutureIsBuiltHere #ChangeTheWorld Within BR&T, Boeing's Solid State Electronics Development organization (SSED) performs microelectronics technology development and design for aerospace systems. We develop digital, analog, and RF Systems on Chip (SoCs) for radar, navigation, electronic warfare, communications, processing, and other electronic systems. These systems are used on Boeing airborne, terrestrial, and satellite platforms. Designs are implemented with state of the art semiconductor process technologies including CMOS, GaAs, GaN, and SiGe. SSED uses external wafer fabrication but performs design (architecture, RTL, synthesis, circuits, physical design, verification, packaging and test) in house. SSED has numerous microelectronics projects, funded both by internal Boeing customers and external Government Science and Technology (S&T) customers. SSED's large staff of microelectronics engineers conduct research and designs microelectronics hardware in support of these projects. We are seeking a Mid Level Digital Integrated Circuit Design Engineer with experience developing complex, high-performance ASICs, FPGAs, and SoCs (e.g. custom multicore processors, digital signal processors) for military/aerospace or other safety-critical systems. This position will be located in Huntington Beach or El Segundo, California. Position Responsibilities Include: --- Microarchitecture design and behavioral modeling (e.g. Matlab, Arm Socrates)--- RTL design (Verilog, VHDL),--- RTL verification (simulation, emulation),--- Integration of 3rd party IP (digital, mixed-signal), synthesis, place & route, design-for-test (DFT) insertion--- Static timing analysis / timing closure--- Power analysis, formal verification, and documentation development This position requires the ability to obtain a U.S. Security Clearance for which the US Government requires US Citizenship. Post start secret clearance is required Required Qualifications: --- Bachelor's, Master's or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry--- 2+ years of experience in the design/development or validation of integrated circuits. Preferred Qualifications: --- Greater than the minimum level of design experience in analog, digital, mixed signal, RF, or SoC domains or experience designing and/or testing chips in more than one domain.--- Deep understanding and experience with industry Electronic Design Automation (EDA) tools and methodologies for digital ASIC/FPGA/SoC design and verification - e.g. Synopsys VCS, Design Compiler, ICC2, StarRC, PrimeTime, Tetramax, Formality; Cadence Genus, Innovus, Conformal, Joules, JasperGold; Mentor Graphics Questa, Tessent; Xilinx Vivado; and Universal Verification Methodology (UVM)--- Experience working on large-scale SoC design teams.--- Experience developing digital ASICs and SoCs in state-of-the-art semiconductor fabrication processes (e.g. 7/10/12/14/16nm FinFET CMOS, 22nm FDSOI CMOS)--- Experience developing digital or analog/mixed-signal ICs for extreme environment applications (e.g. radiation-hardened, extreme low/high temperatures, ultra-long lifetime)--- Experience with development of digital or analog/mixed-signal circuits for hardware security applications--- Experience supporting military radar, communications, electronic warfare, or avionics/mission processor programs--- Demonstrated track record as a high performance team member--- Excellent verbal and written communication ability--- Active security clearance Typical Education & Experience: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 5 or more years' related work experience or an equivalent combination of technical education and experience (e.g. PhD, Master+3 years' related work experience). In the USA, ABET accreditation is the preferred, although not required, accreditation standard. Relocation: This position offers relocation based on candidate eligibility. Drug Free Workplace: Boeing is a Drug Free Workplace where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies. Shift: This position is for 1st shift

Keywords: BOEING, Carson , Mid Level Digital Integrated Circuit Engineer, Engineering , Carson, California

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